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| (R) EMIF02-USB01 IPADTM 2 LINES EMI FILTER INCLUDING ESD PROTECTION MAIN APPLICATION ESD protection and EMI filtering for USB port. s DESCRIPTION The EMIF02-USB01 is a highly integrated array designed to suppress EMI / RFI noise for USB port filtering. The EMIF02-USB01 flip-chip packaging means the package size is equal to the die size. That's why EMIF02-USB01 is a very small device. Additionally, this filter includes an ESD protection circuitry which prevents the protected device from destruction when subjected to ESD surges up to 15 kV. BENEFITS 2 lines low-pass-filter + 2 lines ESD protection High efficiency in EMI filtering Very low PCB space consuming: 2.5 mm2 Very thin package: 0.65 mm High efficiency in ESD suppression (IEC61000-4-2 level 4) High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging. s s s s s s s Flip Chip package PIN CONFIGURATION 3 2 1 A B C D COMPLIES WITH THE FOLLOWING STANDARDS : IEC61000-4-2 level 4 15kV (air discharge) 8 kV (contact discharge) on input & output pins. E TM : ASD is trademark of STMicroelectronics. January 2003 - Ed: 5 1/6 EMIF02-USB01 SCHEMATIC A3 A1 B2 C1 1.3K 33R C3 D2 (gnd pin) 33R E1 E3 Fig. 1: Filtering behavior EMIF02-USB01: filtering response of lines C1/C3 and E1/E3 0.00 dB -5.00 -10.00 -15.00 -20.00 -25.00 -30.00 -35.00 -40.00 -45.00 -50.00 1.0M E1_E3 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G C1_C3 3.0G Fig. 2: ESD response to IEC61000-4-2 Level 4 Vin Vout Frequency/Hz Fig. 3: Capacitance versus reverse applied voltage 40 35 30 C (pF) Fig. 4: Digital crosstalk 0.00 dB -10.00 -20.00 -30.00 -40.00 25 20 15 10 0 0.5 1 1.5 2 2.5 3 VR (V) 3.5 4 4.5 5 -50.00 -60.00 -70.00 -80.00 -90.00 -100.0 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G f/Hz 2/6 EMIF02-USB01 ABSOLUTE MAXIMUM RATINGS (Tamb = 25 C) Symbol VPP Tj Top Tstg Parameter and test conditions ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge Junction temperature Operating temperature range Storage temperature range Value 15 8 125 -40 to + 85 -55 to +150 Unit kV C C C ELECTRICAL CHARACTERISTICS (Tamb = 25 C) Symbol VBR IRM VRM VCL Rd IPP Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current slope: 1/Rd Symbol VBR IRM Cline R1,R2 R3 IR = 1 mA VRM = 3V @ 0V Tolerance 5% Tolerance 5% Test conditions Min. 6 Typ. Max. Unit V 0.1 40 33.0 1.30 0.5 45 A pF k 3/6 EMIF02-USB01 APLAC MODELS Fig. 5: Aplac model of resistors 3.8nH C1 Csub rsub_1k3 rsub_1k3 Csub R_1k3 A3 bulk 0.15nH cap_33R R_33R Csub rsub_33R Csub rsub_33R 0.23nH C3 cap_33R bulk 0.3nH E1 cap_33R Csub rsub_33R Csub rsub_33R R_33R 0.7nH E3 cap_33R bulk Fig. 6: Aplac model of the diodes A1, A3, B2, C1, C3, E1, E3 Fig. 7: Aplac model of bumps & ground connections Cbump Rsubump I/O D2 bulk Lbump 100m D2 bulk Rbump 0.15nH D02_usb D02_usb D02_Nw Lhole caphole Lgnd_D Rsub_D Rhole D2 bulk 4/6 EMIF02-USB01 Fig. 8: Aplac model parameters aplacvar R_33R 33.9 aplacvar cap_33R 1.2pF aplacvar R_1k3 1.3k aplacvar Cz 29pF aplacvar Rsub_D 100 aplacvar Csub0.3pF aplacvar Rsub_33R 15 aplacvar Rsub_1k3 50 aplacvar lhole 10pH aplacvar Rhole 400m aplacvar Caphole0.4pF aplacvar Lgnd_D 150pH Lgnd aplacvar Lbump 50pH aplacvar Rbump 50m aplacvar Cbump 1.5pF aplacvar Rsubump 150 Model D02_Nw BV=100 IBV=1m CJO=6.8p M=0.3333 RS=2 VJ=0.6 TT=100n Model D02_usb BV=16 IBV=1m CJO=Cz M=0.3333 RS=2 VJ=0.6 TT=100n Fig. 9: Comparison between Aplac simulations and measured frequency response. 0.00 dB -5.00 -10.00 -15.00 -20.00 -25.00 -30.00 -35.00 -40.00 -45.00 -50.00 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G Aplac: C1/C3 simulation measure f/Hz Meas: C1_C3_symm ORDER CODE EMIF Electro Magnetic Interference Filter 02 - USB 01 Version Nb of lines USB port fonction PACKAGE MECHANICAL DATA 700 50 5 49 m 315 50 650m 65 49 5 m 50 1.27mm 50m 1.97mm 50m 50 5/6 EMIF02-USB01 MARKING 365 240 Dot identifying Pin A1 location* 1.5 +/- 0.1 4 +/- 0.1 (R) PACKING 365 1.75 +/- 0.1 3.5 +/- 0.1 8 +/- 0.3 xxx yww xxx yww xxx yww ST ST ST 220 FFT yww All dimensions in m 40 4 +/- 0.1 All dimensions in mm User direction of unreeling OTHER INFORMATION Ordering code EMIF02-USB01 Marking FFT Package Flip Chip Weight 3.35 mg Base qty 5000 Delivery mode Tape & reel (7") Note: More packing informations are available in the application note AN1235: ''Flip-Chip CSP: Package description and recommandations for use'' Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 6/6 |
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